Design and Analysis of Low Power Braun Multiplier using Ladner Fischer Adder

Abstract

Multiplier is important in many dsp systems and in many hardware blocks. Multiplier are used in various
DSP application like digital filtering, digital communication, this requires parallel array multiplier to achieve high
execution speed and to meet the performance. A typical implementation of such an array multiplier is Braun design.
Braun multiplier is a type of parallel multiplier, Braun multiplier architecture consist of some carry save adder number
of AND gates and Ripple Carry Adder Braun multiplier is proposed with high speed Parallel Prefix Adder instead of
using Ripple Carry Adder. This modified Braun multiplier reduced the delay due to the Ripple Carry Adder .The Braun
multiplier using Parallel Prefix Adder (PPA) is implemented using Tanner EDA tool.