LOW POWER AND HIGH PERFORMANCE MSML DESIGN FOR CAM USE OF MODIFIED XNOR CELL

Authors

  • Vidhi Chaudhary M.Tech (E.V.D), Department of CSPIT, Charusat University, Changa, India.
  • Sarman K. Hadia Associate Professor, Department of CSPIT, Charusat University, Changa, India
  • Brijesh Shah Associate Professor, Department of CSPIT, Charusat University, Changa, India
  • Rachna Jani Associate Professor, Department of CSPIT, Charusat University, Changa, India

Keywords:

Master-slave match line (MSML),Master-slave (MS), content- addressable memory (CAM), low power, match line (ML), match delay (MD), Master match-lines (MMLs), Slave match-lines (SMLs)

Abstract

MSML design has been shown with the help of modified XNOR cell. Mainly this is used for low power and high
performance. To perform the searching operations conventional design use only single match-lines and Master-Slave match
line use single MMLs and multiple SMLs. Lower Power and high performances when MML share charge with mismatch
SML. In this paper the simulations are obtained using Tanner EDA V-13 tool with 90nm CMOS technology. Match-delay of
implementation of CAM design compare to conventional design in different bit-size condition.

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Published

2018-04-25

How to Cite

Vidhi Chaudhary, Sarman K. Hadia, Brijesh Shah, & Rachna Jani. (2018). LOW POWER AND HIGH PERFORMANCE MSML DESIGN FOR CAM USE OF MODIFIED XNOR CELL. International Journal of Advance Engineering and Research Development (IJAERD), 5(4), 891–900. Retrieved from https://ijaerd.org/index.php/IJAERD/article/view/3179

Issue

Vol. 5 No. 4 (2018): Volume 5 Issue 4 April 2018

Section

Articles