Effect of Convergence on Hardware Design Flow of Digital Signal Processing

Authors

  • Laxman Perika Asst. Professor, Dept. of ECE , Jagruti Institute of Engineering & Technology

Keywords:

Digital Signal Processing, Application Specific Integrated Circuits, Field Programmable Gate Array, Augmented C/C design-flow

Abstract

Design of real-time development, memory and processor in digital signal processing systems for decades have
been fulfill on GPP. Various efforts to improve the performance of these systems resulted in the use of specific digital signal
processing devices like DSP processors of electronics design - Application Specific Integrated Circuits. The advance of
RAM-based Field Programmable Gate Arrays has changed the DSP design flow. Software algorithmic designers can now
take their DSP algorithms right from inception to hardware implementation, thanks to the increasing number of C/C++
hardware design flow. This has led to a demand in the industry for graduates with good skills in both electrical engineering
and electronics engineering. This paper evaluates the impact of technology on DSP-based designs, hardware design
languages, and how graduate/undergraduate courses have changed to suit this transition.

Published

2017-11-25

How to Cite

Laxman Perika. (2017). Effect of Convergence on Hardware Design Flow of Digital Signal Processing. International Journal of Advance Engineering and Research Development (IJAERD), 4(11), 823–830. Retrieved from https://ijaerd.org/index.php/IJAERD/article/view/4202