Modified PID Implementation On FPGA Using Distributed Arithmetic Algorithm Comparison with traditional implementation

Abstract

As we know that the application of PID controller span from small industry to high industry. In order to
implement the PID controller on microprocessors or on FPGA, we need a digital form of that controller. Indeed, several
digital forms of PID controller were developed. The key consideration of any design on FPGA is the resources
consumption. In this paper two different schemes of PID implementation on FPGA are presented. The first one is
distributed arithmetic algorithm lookup table (DALUT) based PID controller, and the second one is multipliers based
PID controller. The resources consumption of both schemes is compared using XILINX tool boxes on MATLAB. The
DALUT based PID controller is more efficient and consumes less FPGA resources.