📄 IJAERD-OJS-0382
High Speed and Low Power QPSK Modulator Design using Verilog and Cadence
| Author(s) | : | Usha S.M, Dr. K.R Nataraj |
| Institution | : | EC Dept ,JSS Academy of Technical Education, Bangalore-60 |
| Published In | : | Vol. 1, Issue 12 — December 2014 |
| Page No. | : | 220-225 |
| Domain | : | Engineering |
| Type | : | Research Paper |
| ISSN (Online) | : | 2348-4470 |
| ISSN (Print) | : | 2348-6406 |
Abstract
The Quadrature phase shift keying (QPSK) is one of the forms of phase shift keying (PSK) modulationscheme. The Convention QPSK method using Direct Digital Synthesizer (DDS) consumes more power. This proposedmethod eliminates the DDS and multiplier blocks of the modulator.
🕮 How to Cite
Usha S.M, Dr. K.R Nataraj, “High Speed and Low Power QPSK Modulator Design using Verilog and Cadence”, International Journal of Advance Engineering and Research Development (IJAERD), Vol. 1, Issue 12, pp. 220-225, December 2014.
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