Paper Details

Transpose form finite-impulse response (FIR) filters are inherently pipelined and support multiple constantmultiplications (MCM) technique that results in significant saving of computation. However, transpose form configurationdoes not directly support the block processing unlike direct-form configuration. In this paper, we explore the possibility ofrealization of block FIR filter in transpose form configuration for area-delay efficient realization of large order FIR filtersfor both fixed and reconfigurable applications. Based on a detailed computational analysis of transpose form configurationof FIR filter, we have derived a flow graph for transpose form block FIR filter with optimized register complexity. Ageneralized block formulation is presented for transpose form FIR filter. We have derived a general multiplier-basedarchitecture for the proposed transpose form block filter for reconfigurable applications. A low-complexity design using theMCM scheme is also presented for the block implementation of fixed FIR filters. The proposed structure involvessignificantly less area-delay than the existing block implementation of direct-form structure for medium or large filterlengths, while for the short-length filters For the same filter length and the same block size, the proposed structure involvesless area and delay that of the existing direct-form block FIR structure. All the synthesis and simulation results of theProposed High performance FIR Filters are performed on Xilinx ISE 14.7 using Verilog HDL.

D. Sony, “Design of High speed fixed and reconfigurable FIR filter for speech signal processing”, International Journal of Advance Engineering and Research Development (IJAERD), Vol. 5, Issue 1, pp. 136-148, January 2018.