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DOI will be assigned to every published paper at no additional charge. 📢 Call for Papers — Volume 13, Issue 9 (September 2026) | Submission Deadline: September 30, 2026 | Rapid peer review: 2–3 days | Impact Factor: 7.37 (SJIF 2026)

Paper Details

📄 IJAERD-OJS-6298

FPGA Implementation of Zero-Forcing Pre-coding for MIMO WiMAX Transceivers

Author(s):Junaid Farooq War, Haider Mehraj, Arshid Ahmad Bhat, TaseemNazir, Aaqib Bulla
Institution:Department of Electronics and Communication Engineering, BGSB University, Rajouri, J&K
Published In:Vol. 5, Issue 13 — January 2018
Page No.:-
Domain:Engineering
Type:Research Paper
ISSN (Online):2348-4470
ISSN (Print):2348-6406
Abstract

Next generation wireless communication networks are expected to achieve increasing data rates. To obtainthe expected performance Multi-User Multiple–Input–Multiple–Output (MU–MIMO) is a key technique. In MU–MIMOsystems, the base stations transmit signals to two or more users over the same channel, because of which every user canexperience inter-user interference. In Multiuser MIMO (MU-MIMO) systems, pre-coding is essential to eliminate orminimize the multiuser interference (MUI). The design of a suitable pre-coding algorithm with good overall performanceand low computational complexity at the same time is quite challenging, especially with the increase of systemdimensions. In this paper, FPGA implementation of a novel low-complexity high-performance pre–coding algorithm thatis able to mitigate the multi–user interference of the MU-MIMO systems in the context of a realistic WiMAX applicationscenario is proposed

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🕮 How to Cite

Junaid Farooq War, Haider Mehraj, Arshid Ahmad Bhat, TaseemNazir, Aaqib Bulla, “FPGA Implementation of Zero-Forcing Pre-coding for MIMO WiMAX Transceivers”, International Journal of Advance Engineering and Research Development (IJAERD), Vol. 5, Issue 13, pp. -, January 2018.

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Vol. 13 | Issue 9
September 2026